A field effect transistor (hereinafter also referred to as a “FET”) is an electronic device in which the value of current that flows between a source electrode and a drain electrode is controlled by voltage of a gate electrode.
In this specification, a FET whose gate insulating layer and semiconductor layer each are formed of an organic material is referred to as an “organic field effect transistor” in some cases. In that FET, the semiconductor layer adjoins the gate insulating layer and functions as a channel region. A thin film made of an organic material can be formed on a substrate at around room temperature and also has mechanical flexibility. Accordingly, the organic FET can be formed on a plastic substrate that is soft and has no heat resistance. It therefore is expected to be useful as a basic component for next-generation portable information devices.
Methods of forming an organic thin film on a substrate include a vacuum vapor deposition method and a solution coating method. The solution coating method allows an organic thin film to be formed in a normal-pressure atmosphere. Hence, the solution coating method is expected to make it possible to produce an organic field effect transistor (hereinafter also referred to as an “organic FET”) at lower cost as compared to the vacuum vapor deposition method in which a vacuum apparatus is used.
Various organic FETs that are produced using the solution coating method have been developed at present, but not many of them have been put into practical use yet. When an insulating layer and a semiconductor layer are to be formed by the solution coating method, a first solution in which one of an organic insulator material and an organic semiconductor material has been dissolved is applied and then is dried to form a first layer, and thereafter a second solution in which the other material has been dissolved is applied to the first layer and then is dried to form a second layer. Such a solution coating method, however, may cause mutual dissolution in some cases.
The mutual dissolution is a phenomenon that when the second solution is applied to the first layer, the first layer dissolves into the second solution. Generally, solvents that readily dissolve the organic insulator material are similar to solvents that readily dissolve the organic semiconductor material. Hence, in order to prevent the mutual dissolution from occurring, it is necessary to select a suitable combination of an organic insulator material, an organic semiconductor material, and solvents.
Examples of the conventional technique for forming an organic semiconductor layer (and an organic insulating layer) by the solution coating method include the following three techniques.
JP2003-518754A (WO01/047043) discloses a method of forming a first layer using an organic material that does not dissolve into a second solution. In the patent document, for instance, after a xylene or chloroform solution in which polyalkylthiophene has been dissolved is applied to a base material to form a semiconductor film, a propyl alcohol solution in which polyvinylphenol has been dissolved is applied to the semiconductor film. Thus a semiconductor layer and an insulating layer are formed.
U.S. Patent Application 20030136964 A1 proposes a method of forming a film by a solution coating method using a polycyclic aromatic compound to which a polar group is added. The polycyclic aromatic compound is a low molecular semiconductor material that usually tends not to dissolve in an organic solvent. In this case, however, the polar group is added to the polycyclic aromatic compound, which allows it to readily dissolve in an organic solvent. The organic material contained in the film thus formed is heat-treated and thereby the polar group is removed. Thus it is converted back to the original polycyclic aromatic molecules.
JP2003-258260A proposes a method of forming a thin and dense insulating film by forming a gate electrode of tantalum, aluminum, titanium, niobium, etc. and then anodizing the electrode. An organic semiconductor layer is formed on the insulating film.
In a FET, electric charges (electrons and holes) flow in the vicinity of the interface between an insulating layer and a semiconductor layer. Accordingly, the characteristics of the FET improve as the impurity levels present at the interface decrease. The causes of the generation of the impurity levels include dangling bonds of atoms that are present at the interface, disorder of the crystal structure, the presence of contaminants that adhered to the interface during the process of producing the insulating layer and the semiconductor layer, for example.
In the methods described in JP2003-518754A (WO01/047043) and U.S. Patent Application 20030136964 A1, a solution including an organic insulator material is applied and then is dried to form an insulating layer and thereafter a solution including an organic semiconductor material is applied onto the insulating layer. In these methods, however, since it takes time to dry the solution, there is a possibility that contaminants may adhere to the insulating layer during the drying process.
Furthermore, in the method described in JP2003-258260A, since the gate insulating film is formed by anodizing the gate electrode, there is a possibility that contaminants may adhere to the gate insulating film during this process.
Moreover, in the above-mentioned conventional methods, it is necessary to form an insulating layer and a semiconductor layer individually and therefore a number of steps are required.